Remember our Xen 0wning Trilogy at Black Hat in summer 2008, specifically the presentation on Detecting & Preventing the Xen Hypervisor Subversions?
One of the things we were discussing there was a proposal to include an additional restriction to Intel processors that would disallow execution of usermode pages from within supervisor mode (ring0). Such a feature, we argued, apart from obviously making many ring3-to-ring0 exploits much harder, including the very Xen heap overflow exploit we presented in the slides, would also bring us closer to efficient runtime code integrity checkers for kernels and hypervisors, as discussed in the slides.
|Slide #97, Detecting and Preventing Xen Hypervisor Subversions, Black Hat USA, July, 2008|
Fast forward 3 years. On June 1st, 2011, an Intel engineer is submitting a patch for Xen to support a mysterious new processor feature called SMEP (Supervisor Mode Execution Protection). He writes the feature is not yet documented in SDM, but soon will be. In fact, the May 2011 update of Intel SDM already contains the details:
|Intel SDM, vol. 3a, May 2011, source: intel.com|
Some other people spotted this feature earlier, because of another patch submitted by another Intel engineer to Linux kernel a few weeks ago. Here's a good write up by Dan Rosenberg discussing how this patch makes writing Linux kernel exploits harder, and how it's still possible to write them.
The SMEP feature still doesn't seem to be present in the processors available on the market, including the latest Sand Bridge processors, but there's no question it's coming, now that the feature made it into SDM.
It is quite rewarding to see your idea implemented in a processor... I guess this is how physicists feel when they introduce a new particle as part of a new quantum model, and later discover evidences to support the existence of this very particle in the wild...
Huh. This very idea came up during a chat I had with j00ru today, and we were surprised to find out that you've already proposed it three years ago, and furthermore, that Intel actually proposed it for new CPUs.
Woah, great work Joanna! :)
Anyway, as Dan, we've decided to discuss the implications of this technique with regards to Windows.
http://gynvael.coldwind.pl/?id=394 / http://j00ru.vexillium.org/?p=783
Gratz for your first bit in an intel CR, Joanna and team fellows!
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